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Why this Series is important: These technical webcasts will help you build your general Signal Integrity knowledge. The emphasis of the series, however, is on practical solutions, and you will be exposed to ways others have successfully applied these solutions to solve their Signal Integrity problems.
Who should attend these Series of broadcasts: R&D designers, engineers, and project managers working on high speed digital designs; and dealing with signal integrity related problems in their designs.
Generally any engineer who spends a significant amount of time in debug and validation phase of a high-speed design but would like to spend more effective time in the front end of the design process. ----------------------------------------------------------------------------------
Efficient FPGA Transceiver-based Channel Modeling Using Agilent ADS
With FPGAs so commonly used in high-speed designs, signal integrity issues can be minimized by properly modeling the signal path. This presentation will model real world circuit boards using S-parameters, showing that it is possible to predict eye opening performance before a system is physically prototyped. Both extracted and measured models for interconnects will be used. A 90nm transceiver model is incorporated in Agilent ADS as a new library element, permitting system level modeling of interconnects and FPGA transceivers. Both measured and modeled results are shown and the correlation is discussed, concluding that the new method is both execution time efficient and is sufficiently accurate to provide a high level of confidence for designers wishing to design serial links to 6.375 Gb/s. Enroll / View the June 26, 2008 broadcast at 10:00 am PT
You’ve Measured The Jitter, Now How Do You Reduce It? While making accurate measurements is important, it is just one part of the overall jitter problem. This presentation will review both time domain and frequency domain analysis techniques, including phase noise analysis. This allows us go beyond the measured jitter and identify the root causes of jitter problems. Topics such as the relationship between reference clocks and data transmitters and how jitter propagates in a communications system will be investigated. View the recording of the April 26, 2007 broadcast
Demystifying PCI Express 1.1 for add-in card and motherboard designs Enforcement of the PCI Express 1.1 standard will soon be required by the PCI-Sig for vendors who wish to have their products listed on the PCI-Sig’s PCI Express Integrators List. Significant changes in jitter and PLL loop bandwidth were instituted with this change from the PCIe 1.0a specification. This presentation details what you need to know about those changes, how to validate your motherboard and add-in card device under the 1.1 spec thus ensuring that you will easily qualify for the Integrator’s List View the recording of the Jan 24, 2007 broadcast
Quality Probing Techniques for Measuring Multi Gigabit Data Rates The presentation will present some of the common problems associated with high-speed active probing, and demonstrate some novel techniques for solving these probing problems. Issues such as physical connection resonances, making the physical connection without bandwidth loss, and flexibility in making connections, will be discussed. More ...
When measuring Multi Gb/s signals-- which type of oscilloscope should I use? This seminar will provide a comprehensive analysis of how the two oscilloscope architectures operate, what the implications are for the measurement tasks that can be performed including jitter, and a systematic approach to making oscilloscope selections. More ...
Hacking the Backplane:Complete Differential Channel Characterization & Analysis from 4-port Measurement We will show how to data mine the rich source of information to unlock the channel’s secrets such as its differential impedance profile, the skew between lines, mode conversion, possible radiated emissions, the bandwidth of the interconnect, its rise time degradation, the expected eye diagram, and how to extract RLGC models of the channel for system level simulation. More ...
Testing Receiver Jitter Tolerance – Why It’s Important At Higher Data Rates This presentation will reviews the critical parameters and their measurement required for the backplane design process and how a combination of frequency domain and time domain analyses uncovers the very subtle yet critical barriers to the design of working systems to rates of 10 Gb/s and beyond. More...
Active Channel Characterization Techniques for 5 Gb/s Designs and Higher This presentation reviews the critical parameters and their measurement required for the backplane design process and how a combination of frequency domain and time domain analyses uncovers the very subtle yet critical barriers to the design of working systems to rates of 10 Gb/s and beyond. More...
Solving Real World Jitter Problems For High-Speed Communications Several case studies on how test equipment was used to solve some difficult design and manufacturing problems. We will review the measurement needs, how the measurements were made, and what insight was learned to resolve the design and/or test issues. More...
Jitter Analysis eSeminar, What Works, What Doesn't, and Why The variation in the results are described both quantitatively and qualitatively and lay to rest the issue of which test techniques are effective and which are not. More...
Being Successful with Fully Buffered DIMM (FBD) Designs This presentation discusses debug and test methodologies for FBD. Examples are used to illustrate how today´s tools provide rapid insight into signal integrity and functional failures. discusses debug and test methodologies for FBD. Examples are used to illustrate how today´s tools provide rapid insight into signal integrity and functional failures. More...
-------------------------------------------------- Here are the Signal Integrity events older than one year. Although the recordings of the broadcasts are no longer available, you may order CD-ROMs and download the Adobe Acrobat .pdf files of the presentations. other SI events - CD-ROMS and presentation files
More information about Signal Integrity is available at Application Central: Application Resources for Signal Integrity
Where & When
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