NUREMBERG, Germany, Embedded World 2009, Booth 225, March 3, 2009
Agilent Technologies Inc. (NYSE: A) today introduced the industry's first and most comprehensive DDR3 protocol debug and validation test suite for digital designers developing computer and embedded memory applications. The test platform offers the industry's fastest full channel 2.0GT/s 16962A logic analysis module, a complete probing portfolio for DDR3 BGA and DIMM, and the first DDR3 compliance and performance software environment.
This test suite is ideal for R&D engineers integrating a memory controller with the DDR memory devices on the memory subsystem for interoperability testing. This is the key challenge for most designers as the memory controller design can be developed in-house or acquired from third-party IP (intellectual property).
The use of DDR3 has significantly increased in both the computer and embedded memory design market. DDR3 provides higher performance and lower power compared to DDR2, which encourages many memory designers to adopt DDR3 memory devices in their board design.
Today's computer speeds and complexities demand that engineers take test and measurement requirements into account when writing specifications so that the technology will be testable. Measurements are central to the diagnosis of a problem and when proving the correct fix has been made. Agilent contributes to the standards groups, such as JEDEC, to ensure design for test is occurring and guaranteeing that Agilent products measure for specification compliance.
Features and benefits of the Agilent DDR test suite include:
In addition to announcing a complete DDR solution for the industry, Agilent is introducing its first B4622A DDR2/3 protocol compliance and analysis tool. This tool provides timing and protocol violation check, an automated physical address trigger setup tool, and overview of system performance through bus statistic information and histogram view of address access. The tool will help reduce memory designers' troubleshooting time and increase productivity and efficiency in DDR design validation work.
"The industry needs a complete solution for DDR functional validation from both a probing and analysis point of view," said Perry Keller, Memory program manager at Agilent's Digital Test Division and member of the JEDEC Board of Directors. "Agilent's new probing solution meets both the computer and embedded design market needs. The new protocol compliance and analysis tool provides insights to the memory bus activities to quickly identify problem areas in the design, and allows our customers to launch their products faster into their markets."
The Agilent N4835A DDR3 slot interposer supports industry standard 240-pin DDR3 DIMMs. The B4622A DDR2/3 Protocol Compliance and Analysis tool works with all the current Agilent's DDR2/3 solution.
Additional information about Agilent's DDR3 BGA probe adapter is available at www.agilent.com/find/ddr3bga and DDR3. Information about the slot interposer is available at www.agilent.com/find/ddr3DIMM. The protocol compliance and analysis information is posted at www.agilent.com/find/ddrtool.
High-resolution images are available at www.agilent.com/find/ddr3bga_images. A backgrounder about the various memory technologies and Agilent's test solutions is available at www.agilent.com/find/memory_backgrounder. More information about DDR and Agilent's solutions is available at www.agilent.com/find/ddr.
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About Agilent Technologies
Agilent Technologies Inc. (NYSE: A) is the world's premier measurement company and a technology leader in communications, electronics, life sciences and chemical analysis. The company's 19,000 employees serve customers in more than 110 countries. Agilent had net revenues of $5.8 billion in fiscal 2008. Information about Agilent is available on the Web at www.agilent.com.
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